A Highly Configurable High-Level Synthesis Functional Pattern Library
نویسندگان
چکیده
منابع مشابه
High-level synthesis techniques for functional test pattern execution1
Functional debugging often dominates the time and cost of the ASIC system development, mainly due to the limited controllability and observability of the storage elements in designs, and therefore the intermediate variables in functional specifications. We propose a new divide-and-conquer approach for maximizing the simultaneous controllability of an arbitrary set of the user selected variables...
متن کاملA Highly Efficient and Comprehensive Image Processing Library for C++-based High-Level Synthesis
Field Programmable Gate Arrays (FPGAs) are proved to be among the most suitable architectures for image processing applications. However, accelerating algorithms using FPGAs is a time-consuming task and needs expertise. Whereas the recent advancements in High-Level Synthesis (HLS) promise to solve this problem, today’s HLS tools require efficient hardware descriptions of algorithms to be able t...
متن کاملSPROV 2.0: A Highly-Configurable Platform-Independent Library for Secure Provenance
Data provenance allows us to explore the lineage and derivation history of data objects. As data and its provenance flow between people and tasks in potentially untrusted environments, it becomes essential to provide integrity and confidentiality assurances for provenance. Any solution also needs to be efficient, modular, and easy to deploy. In this poster and demonstration proposal, we discuss...
متن کاملStorage Assignment and Memory Optimizations during High-level Synthesis for Configurable Architectures
Modern, high performance configurable architectures integrate on-chip, distributed block RAM modules to provide ample data storage. Synthesizing applications to these complex systems requires an effective and efficient approach for data partitioning and storage assignment. In this paper, we formally describe this problem and show how it is much different than the traditional data partitioning p...
متن کاملRICH-IP: An Interactive System for Configurable High-Level IP Synthesis
Hardware description language (HDL) based IP synthesis has been the industry standard in recent years. However, it has a number of problems. First, Verilog and VHDL are so low level that they are often compared to assembly languages in terms of programability. The absense of advanced data types and control mechanisms makes programming in these languages tedious and error-prone. For example, to ...
متن کاملذخیره در منابع من
با ذخیره ی این منبع در منابع من، دسترسی به آن را برای استفاده های بعدی آسان تر کنید
ژورنال
عنوان ژورنال: Electronics
سال: 2021
ISSN: 2079-9292
DOI: 10.3390/electronics10050532